Comparing Signal Strength in Verilog/Systemverilog

Language doesn’t allow you directly to compare the signal strength. But you can compare strengths by converting the strings. By using the following macro you can achieve the required function.

`define compSigValues(siga, sigb)
  begin
  string sigaStr, sigbStr;
  $sformat(sigaStr, "%v", siga);
  $sformat(sigbStr, "%v", sigb);
  if ( sigaStr == sigbStr )
$display("Signal values %s and %s match", sigaStr, sigbStr);
  else
$display("Signal values %s and %s don't match", sigaStr, sigbStr);
 end